Asic Dft Engineer

Broadcom

California, United States
Base: $120,000 - $192,000; bonus/equity: discretio...
Dft architecture and implementation
Testability techniques scan and bist
Atpg pattern generation and verification
Broadcom is seeking a Staff DFT engineer to drive state-of-the-art testability and debug solutions while optimizing test costs

Job Summary

  • Broadcom is seeking a Staff DFT engineer to drive state-of-the-art testability and debug solutions while optimizing test costs.
  • The role includes ownership of IP DFT architecture, collaboration with front-end and backend engineers, and participation in silicon bring-up and yield recovery.
  • Broadcom offers a competitive salary range, discretionary annual bonus, equity awards, and a comprehensive benefits package including medical, dental, vision, 401(K), ESPP, and paid leaves.

Matching Summary

Broadcom is seeking a Staff DFT engineer to drive state-of-the-art testability and debug solutions while optimizing test costs.

Salary

Base: $120,000 - $192,000; Bonus/Equity: Discretionary annual bonus and equity awards; Benefits: Medical, dental, vision, 401(K) matching, ESPP, paid leave

Skills & Requirements

Must-have

  • DFT architecture and implementation
  • Testability techniques SCAN and BIST
  • ATPG pattern generation and verification
  • Pre/Post Silicon debugging
  • STA constraints development
  • Mentor/Siemens DFT Tessent tool suite

Nice-to-have

  • Knowledge of SERDES and Analog/mixed-signal DFT
  • Strong verbal and written communication skills
  • Self-driven with good planning and organizing skills
  • Experience with TCL, perl and shell scripting

Key Requirements

  • Minimum 8+ years industry experience with Bachelor’s degree
  • Master’s degree with minimum 6+ years industry experience
  • Knowledge of JTAG standards 1149.1, 1149.6, 1687
  • Experience in MBIST implementation and repair schemes
  • Experience with gate level simulations and industry simulators

Work Rights

Not specified

Tailored Resume

Cover Letter