This role focuses on developing and maintaining tools, flows, and methodologies to enable efficient integrated circuit design from netlist to physical release
Job Summary
This role focuses on developing and maintaining tools, flows, and methodologies to enable efficient integrated circuit design from netlist to physical release.
The engineer will collaborate closely with design, technology, and CAD teams to integrate third-party EDA tools and ensure interoperability across multiple technology nodes.
Candidates are expected to utilize emerging AI and ML technologies to drive automation initiatives that reduce cycle time and improve design efficiency.
Matching Summary
This role focuses on developing and maintaining tools, flows, and methodologies to enable efficient integrated circuit design from netlist to physical release.
Skills & Requirements
Must-have
Cadence Virtuoso user or enabler
SKILL Python Tcl scripting languages
IC design fundamentals netlisting timing closure
Nice-to-have
HV implementation knowledge in custom design
Experience with AI ML technologies for productivity
Cloud-based design environments and parallel computing
Key Requirements
Bachelor's or Master's degree in Electrical Engineering or related field
4-12 years experience in IC design
Strong programming skills in SKILL, Python, or Tcl