The role involves owning the device safety architecture and leading efforts to achieve safety goals for next-generation semiconductor devices
Job Summary
The role involves owning the device safety architecture and leading efforts to achieve safety goals for next-generation semiconductor devices.
Candidates must perform comprehensive safety analyses using FTA, FMEA, and DFA methodologies to ensure fault tolerance and independence requirements are met.
The position requires guiding teams through ASIL/SIL decomposition and collaborating with cross-functional teams to deliver critical safety collaterals for certification.
Matching Summary
The role involves owning the device safety architecture and leading efforts to achieve safety goals for next-generation semiconductor devices.
Skills & Requirements
Must-have
Safety analyses FTA FMEA DFA methodologies
Define safe architecture patterns lockstep CPUs
Achieve diagnostic coverage metrics SPFM LFM PMHF
Collaborate with verification teams on safety V&V strategy
Nice-to-have
Familiarity with RTL coding and simulations
Desire to develop deep understanding of end user needs
Ability to resolve complex issues creatively
Self-driven and result oriented mindset
Key Requirements
Bachelor's or Master's Degree in Electrical Engineering
10 years silicon industry experience with BS or 8 years with MS
Relevant safety professional certifications like FSCP or FS Professional license
Experience certifying devices from concept through certification for ASICs/PLDs/CPUs