2026 Campus - Soc Dft Engineer

NXP Semiconductors

Tianjin, China
Dft architecture definition
Dft flow setup and maintenance
Scan/mbist/jtag insertion
NXP team members create breakthrough technologies that make the connected world better, safer and more secure

Job Summary

  • NXP team members create breakthrough technologies that make the connected world better, safer and more secure.
  • Be responsible for definition and implementation different schemes of DFT aspects: including scan/MBIST/JTAG insertion, ATPG generation, test patterns generation.
  • Good knowledge and experience in DFT implementation methodology, flow optimization and DFT coverage improvement.

Matching Summary

NXP team members create breakthrough technologies that make the connected world better, safer and more secure.

Skills & Requirements

Must-have

  • DFT architecture definition
  • DFT flow setup and maintenance
  • Scan/MBIST/JTAG insertion
  • ATPG generation
  • RTL/netlist simulation
  • ATE on-line debugging

Nice-to-have

  • Mentor tool experience
  • Post-silicon DPPM improvement
  • Coverage hole analysis
  • Innovative and passionate team member

Key Requirements

  • Bachelor or master’s degree
  • DFT implementation methodology
  • Flow optimization
  • DFT coverage improvement

Work Rights

Not specified

Tailored Resume

Cover Letter