Soc Design Verification Lead

Altera Digital Health

Bengaluru, Karnataka, India
Uvm verification methodology
System verilog language
Arm based soc verification
Lead SoC architecture verification including creating verification strategy, developing test cases and test bench using UVM methodology

Job Summary

  • Lead SoC architecture verification including creating verification strategy, developing test cases and test bench using UVM methodology.
  • Coordinate cross functional efforts with Design, SW, Architecture team to achieve full coverage verification plan.
  • Replicates, root causes, and debugs post-si issues in the pre-silicon environment and absorbs learning from post-silicon to update test plans for future products.

Matching Summary

Lead SoC architecture verification including creating verification strategy, developing test cases and test bench using UVM methodology.

Skills & Requirements

Must-have

  • UVM verification methodology
  • System Verilog language
  • ARM based SoC verification
  • leading verification strategy
  • full chip verification

Nice-to-have

  • scripting in Linux/Unix
  • Perl and/or Python proficiency
  • Design for Debug experience
  • flexible in dynamic environment
  • strong communication skills

Key Requirements

  • 12+ years of experience
  • B.Tech/M.Tech in Electrical Engineering, Electronics, or related field
  • Formal verification method experience
  • Experience with protocols such as PCIe, Ethernet, USB, TSN

Work Rights

Not specified

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