Sr Principal Application Engineer

Cadence

San Jose, California, US
Base: $143,500 to $266,500; bonus/equity: eligible...
10+ years physical design experience
Advanced nodes 10nm and below
Tcl/perl/python scripting skills
This role involves working side-by-side with leading-edge customers to deploy market-leading technologies for Synthesis, P&R, and Signoff

Job Summary

  • This role involves working side-by-side with leading-edge customers to deploy market-leading technologies for Synthesis, P&R, and Signoff.
  • The successful candidate will collaborate directly with the R&D group to drive customer requirements and influence next-generation product directions.
  • Employees are eligible for a competitive salary range of $143,500 to $266,500 along with bonus, equity, and comprehensive benefits.

Matching Summary

This role involves working side-by-side with leading-edge customers to deploy market-leading technologies for Synthesis, P&R, and Signoff.

Salary

Base: $143,500 to $266,500; Bonus/Equity: Eligible for incentive compensation including bonus and equity; Benefits: Paid vacation, holidays, 401(k) match, medical/dental/vision plans

Skills & Requirements

Must-have

  • 10+ years Physical Design experience
  • Advanced nodes 10nm and below
  • Tcl/Perl/Python scripting skills
  • Place and Route expertise
  • Static Timing Analysis knowledge

Nice-to-have

  • Strong customer-facing communication
  • Continuous learning drive
  • Experience with 5nm nodes
  • MS degree in related field

Key Requirements

  • Minimum 10+ years industry Physical Design experience
  • BS degree in Computer Science, Electrical Engineering, or related field
  • Prior experience with IC digital implementation flows

Work Rights

Not specified

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