Junior Physical Design Engineer

Cisco UK

Armenia
Not specified (assumed hybrid or onsite based on typical industry standards).
Clock tree synthesis (cts) expertise
Spice simulation tools experience
Eda tools proficiency
Cisco UK is seeking a Junior Physical Design Engineer to join their ASIC Physical Design Team in Armenia, focusing on clock tree synthesis and enhancing semiconductor designs. The role offers opportunities for growth within a collaborative environment dedicated to innovation in silicon technology

Job Summary

  • Cisco's ASIC Physical Design Team drives the future of chip design by managing full chip physical implementation from RTL to GDSII and beyond.
  • The role involves executing precise Clock Tree Synthesis and optimization, performing transistor-level SPICE simulations, and collaborating with multiple teams to deliver high-quality silicon solutions.
  • Cisco offers a collaborative environment fueled by innovation, providing limitless opportunities to grow and build impactful technology on a global scale.

Matching Summary

Match Score: 85

Cisco UK is seeking a Junior Physical Design Engineer to join their ASIC Physical Design Team in Armenia, focusing on clock tree synthesis and enhancing semiconductor designs. The role offers opportunities for growth within a collaborative environment dedicated to innovation in silicon technology.

Skills & Requirements

Must-have

  • Clock Tree Synthesis (CTS) expertise
  • SPICE simulation tools experience
  • EDA tools proficiency
  • Transistor-level simulation
  • Timing closure collaboration
  • Automated scripting with TCL or Python

Nice-to-have

  • Low-power design techniques
  • Advanced clock gating strategies
  • EM/IR analysis exposure
  • Process variation understanding
  • Full-chip physical design flow experience
  • Advanced technology nodes knowledge

Key Requirements

  • Bachelor's or Master's degree in Electrical Engineering or related field
  • Minimum 2 years experience in VLSI Physical or Circuit Design
  • Expertise in Clock Tree Synthesis concepts
  • Experience with HSPICE, Spectre, or FineSim
  • Experience with Cadence Innovus, Synopsys PrimeTime, or Cadence Virtuoso

Work Rights

Not specified

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