Analog Layout Design Engineer

Altera Corporation

Penang, Malaysia
Analog/mixed-signal ic layout design
Cadence virtuoso
Mentor graphics
The successful candidate will be responsible for leading the FPGA physical design and layout of complex digital, analog and mixed-signal integrated circuits (ICs), ensuring optimal performance, reliability, and manufacturability

Job Summary

  • The successful candidate will be responsible for leading the FPGA physical design and layout of complex digital, analog and mixed-signal integrated circuits (ICs), ensuring optimal performance, reliability, and manufacturability.
  • Key Responsibilities include leading and executing layout design, collaborating with circuit designers, planning and managing layout schedules, and conducting thorough physical verification.
  • The role requires interfacing with foundry partners to ensure compliance with process design rules and manufacturing best practices, and documenting design methodology.

Matching Summary

The successful candidate will be responsible for leading the FPGA physical design and layout of complex digital, analog and mixed-signal integrated circuits (ICs), ensuring optimal performance, reliability, and manufacturability.

Skills & Requirements

Must-have

  • analog/mixed-signal IC layout design
  • Cadence Virtuoso
  • Mentor Graphics
  • DRC, LVS, ERC including RV
  • floorplanning, placement, and routing

Nice-to-have

  • technical mentorship to junior engineers
  • experience mentoring and leading teams

Key Requirements

  • 8+ years of experience
  • Bachelor’s or Master’s degree
  • Electrical Engineering, Microelectronics, or related field

Work Rights

Not specified

Tailored Resume

Cover Letter