Mixed Signal Design Verification Engineer

Intel Corporation

Hillsboro, Oregon, United States
Base: $122,440.00-232,190.00 usd; bonus/equity: st...
Hybrid
Bachelor's or master's degree in engineering
3+ years digital logic experience
Vhdl/verilog/system verilog proficiency
Intel Corporation is seeking a Mixed Signal Design Verification Engineer to perform functional verification of mixed signal logic components. The ideal candidate will have a strong background in digital logic, VHDL/Verilog/System Verilog, and experience with testbench development

Job Summary

  • Intel is seeking a Mixed Signal Design Verification Engineer to perform functional verification of mixed signal logic components and develop comprehensive IP verification plans.
  • The role requires executing verification plans, running system simulation models, and collaborating with digital and analog teams to ensure designs meet performance and power goals.
  • Candidates will benefit from a competitive total compensation package including stock bonuses, health benefits, retirement plans, and a hybrid work model.

Matching Summary

Match Score: 85

Intel Corporation is seeking a Mixed Signal Design Verification Engineer to perform functional verification of mixed signal logic components. The ideal candidate will have a strong background in digital logic, VHDL/Verilog/System Verilog, and experience with testbench development.

Salary

Base: $122,440.00-232,190.00 USD; Bonus/Equity: Stock bonuses included; Benefits: Health, retirement, vacation

Skills & Requirements

Must-have

  • Bachelor's or Master's degree in Engineering
  • 3+ years digital logic experience
  • VHDL/Verilog/System Verilog proficiency
  • Testbench component development skills
  • OVM/UVM methodology experience

Nice-to-have

  • 7+ years related experience
  • Analog debug skills
  • Real number simulation modeling
  • Collaboration with architects
  • Power and timing analysis expertise

Key Requirements

  • Bachelor's Degree with 3+ years experience OR Master's with 2+ years
  • Experience in Digital logic
  • Experience in VHDL/Verilog/System Verilog
  • Experience in Testbench component development
  • Design debugging skills

Work Rights

Not specified

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