Intern - Design Engineering

Cadence

Shanghai, China
Master's degree in microelectronics or ee
Digital backend tool proficiency
Strong problem-solving skills
The role focuses on high-speed digital DDR and HBM IP physical implementation within a team delivering advanced technology products

Job Summary

  • The role focuses on high-speed digital DDR and HBM IP physical implementation within a team delivering advanced technology products.
  • Candidates will solve design issues, analyze PPA optimization results, and implement optimal design parameters for various projects.
  • This internship offers rich experience in industry-standard processes including TSMC and Samsung nodes up to 6400MHz frequencies.

Matching Summary

The role focuses on high-speed digital DDR and HBM IP physical implementation within a team delivering advanced technology products.

Skills & Requirements

Must-have

  • Master's degree in Microelectronics or EE
  • Digital backend tool proficiency
  • Strong problem-solving skills
  • Chinese and English communication

Nice-to-have

  • Scripting or tool development experience
  • PPA optimization methodology knowledge
  • Team collaboration abilities
  • Proactive attitude and responsibility

Key Requirements

  • Master's degree in Microelectronics or Electronic Engineering
  • Minimum 3 days per week availability
  • 6-8 month internship duration commitment

Work Rights

Not specified

Tailored Resume

Cover Letter