Not specified; not specified; competitive compensa...
Expert-level systemverilog and uvm knowledge
Deep understanding of mixed-signal design principles
Advanced debugging across rtl and gate-level simulations
This role involves providing technical leadership to architect sophisticated verification environments for complex analog and mixed-signal designs at a global semiconductor leader
Job Summary
This role involves providing technical leadership to architect sophisticated verification environments for complex analog and mixed-signal designs at a global semiconductor leader.
The successful candidate will drive functional and code coverage closure while leading complex debugging efforts with minimal direction.
Analog Devices offers a supportive culture focused on professional growth, competitive compensation, and the opportunity to work on cutting-edge projects that bridge physical and digital worlds.
Matching Summary
This role involves providing technical leadership to architect sophisticated verification environments for complex analog and mixed-signal designs at a global semiconductor leader.
Salary
Not specified; Not specified; Competitive compensation and benefits mentioned
Skills & Requirements
Must-have
Expert-level SystemVerilog and UVM knowledge
Deep understanding of mixed-signal design principles
Advanced debugging across RTL and gate-level simulations
Experience with Cadence or Synopsys EDA tools
Proficiency in Python, Perl, TCL, or Shell scripting
Nice-to-have
Technical leadership and mentorship capabilities
Customer representation experience
Formal verification techniques expertise
Collaborative team environment
Influence on verification methodology adoption
Key Requirements
MS/PhD in Electrical or Computer Engineering
7-10+ years of digital design verification experience
US Citizenship or Permanent Resident status required for export control
Work Rights
Must be US Citizen, US Permanent Resident, or protected individual under 8 U.S.C. 1324b(a)(3)