Ip Logic Design Engineer

Intel Corporation

Bangalore, India
Hybrid
Digital io controllers design
Pcie/cxl/ucie protocol and architecture
Rtl coding skills
The Data Centre-Design Silicon Engineering delivers leadership Xeon products to cloud and datacenter customers through development of industry leading x86 core and differentiated IPs that enhances product performance and competitiveness in both Xeon, Networking & AI platforms

Job Summary

  • The Data Centre-Design Silicon Engineering delivers leadership Xeon products to cloud and datacenter customers through development of industry leading x86 core and differentiated IPs that enhances product performance and competitiveness in both Xeon, Networking & AI platforms.
  • We are seeking an experienced Micro Architect/Senior Design Engineer to design, develop, and implement advanced Digital IO Controllers like PCIe/CXL/UCIe systems for next-generation data center and AI chips.
  • This role requires a unique blend of microarchitectural expertise and hands-on RTL coding skills to bring cutting-edge designs to life.

Matching Summary

The Data Centre-Design Silicon Engineering delivers leadership Xeon products to cloud and datacenter customers through development of industry leading x86 core and differentiated IPs that enhances product performance and competitiveness in both Xeon, Networking & AI platforms.

Skills & Requirements

Must-have

  • Digital IO Controllers design
  • PCIe/CXL/UCIe Protocol and architecture
  • RTL coding skills
  • System Verilog
  • FE RTL2Netlist methodology flows
  • STA
  • Formal Equivalence

Nice-to-have

  • Microarchitectural expertise
  • Scalable memory coherency protocols
  • Interconnect topologies
  • Workload modeling
  • Emerging technologies and trends

Key Requirements

  • 8-12+ years of experience (B.E.)
  • 7-11+ years of experience (M.E.)
  • Digital design experience
  • Relevant experience in Digital design

Work Rights

Not specified

Tailored Resume

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