Senior Soc Design Verification Engineer

Indclutch

Bengaluru, Karnataka, India
8+ years asic verification experience
Systemverilog language proficiency
Uvm methodology expertise
The role involves creating test cases and test benches using UVM methodology for full chip and system functional verification

Job Summary

  • The role involves creating test cases and test benches using UVM methodology for full chip and system functional verification.
  • Candidates must coordinate cross-functional efforts with Design, SW, and Architecture teams to achieve comprehensive coverage plans.
  • Experience with emulation is considered an add-on skill for this pre-silicon system verification position.

Matching Summary

The role involves creating test cases and test benches using UVM methodology for full chip and system functional verification.

Skills & Requirements

Must-have

  • 8+ years ASIC verification experience
  • SystemVerilog language proficiency
  • UVM methodology expertise
  • Linux/Unix scripting skills
  • ARM based SoC verification

Nice-to-have

  • Emulation experience preferred
  • Design for Debug knowledge
  • Cross-functional team collaboration
  • Global site coordination ability

Key Requirements

  • 8+ years of complex ASIC design experience
  • Proficiency in Perl or Python scripting
  • Knowledge of PCIe, Ethernet, USB protocols

Work Rights

Not specified

Tailored Resume

Cover Letter