Mixed Signal Design Verification Engineer

Intel Retiree Medical Plan Trust

Hillsboro, Oregon, United States
Base: $122,440.00-232,190.00 usd; bonus/equity: st...
Hybrid
Bachelor's or master's degree in ee/ce/cs
3+ years digital logic experience
Vhdl/verilog/system verilog proficiency
Intel is seeking a Mixed Signal Design Verification Engineer to perform functional verification of mixed signal logic components, focusing on analog behavioral modeling and testbench development. The ideal candidate should have a background in electrical or computer engineering with experience in digital logic and verification methodologies

Job Summary

  • The role involves performing functional verification of mixed signal logic components to ensure designs meet specification requirements.
  • Candidates will develop IP verification plans, test benches, and environments to confirm coverage against microarchitecture specifications.
  • Intel offers a competitive compensation package including stock bonuses and comprehensive health and retirement benefits.

Matching Summary

Match Score: 85

Intel is seeking a Mixed Signal Design Verification Engineer to perform functional verification of mixed signal logic components, focusing on analog behavioral modeling and testbench development. The ideal candidate should have a background in electrical or computer engineering with experience in digital logic and verification methodologies.

Salary

Base: $122,440.00-232,190.00 USD; Bonus/Equity: Stock bonuses included; Benefits: Health, retirement, and vacation programs

Skills & Requirements

Must-have

  • Bachelor's or Master's degree in EE/CE/CS
  • 3+ years digital logic experience
  • VHDL/Verilog/System Verilog proficiency
  • Testbench component development in OVM/UVM
  • Design debugging skills

Nice-to-have

  • 7+ years related experience
  • Analog debug skills
  • Real number simulation modeling expertise
  • Current and voltage debug skills

Key Requirements

  • Bachelor's degree with 3+ years experience OR Master's with 2+ years
  • Experience in Digital logic
  • Experience in VHDL/Verilog/System Verilog
  • Experience in Testbench component development (preferably in OVM/UVM)
  • Design debugging skills

Work Rights

Not specified

Tailored Resume

Cover Letter