Analog Layout Staff Engineer

Marvell Technology

Bachelor's or master's degree in electrical engineering
4 to 8 years of professional experience
Full-custom circuit layout and verification experience
You will play a leading role on developing next-generation high speed SerDes IPs for Marvell's Central Engineering team

Job Summary

  • You will play a leading role on developing next-generation high speed SerDes IPs for Marvell's Central Engineering team.
  • The role requires full-custom circuit layout, verification, and RC extraction experience using advanced FinFET technologies.
  • Marvell offers competitive compensation, great benefits, and an environment of shared collaboration and transparency.

Matching Summary

Match Score: 85

You will play a leading role on developing next-generation high speed SerDes IPs for Marvell's Central Engineering team.

Skills & Requirements

Must-have

  • Bachelor's or Master's Degree in Electrical Engineering
  • 4 to 8 years of professional experience
  • Full-custom circuit layout and verification experience
  • Advanced semiconductor technology process knowledge
  • Cadence Virtuoso environment proficiency

Nice-to-have

  • Mixed signal/analog/high speed layout experience
  • Experience with EMIR analysis and ESD solutions
  • Programming skills and automation background
  • Willingness to work with global teams
  • Self-motivated learning competency

Key Requirements

  • 4 to 8 years related professional experience
  • Degree in Electrical/Electronics Engineering or Microelectronics
  • Eligibility to access export-controlled information under US law

Work Rights

Must be eligible to access export-controlled information (US citizen, LPR, or protected individual)

Tailored Resume

Cover Letter