Not specified (assumed to be onsite, given the location).
Rtl coding based on verilog
Asic design flow experience
Cadence digital implementation tools
LITE-ON SINGAPORE PTE. LTD. is seeking a Junior/Senior R&D Digital IC Design Engineer to contribute to ASIC digital design projects. The ideal candidate should possess a degree in Electrical Engineering and have experience in digital design, specifically with Verilog and ASIC design flows
Job Summary
The role involves working on ASIC digital design including RTL coding and simulation.
Candidates must be familiar with the full ASIC design flow using Cadence tools.
The position requires strong analytical skills and the ability to work independently in a team.
Matching Summary
Match Score: 75
LITE-ON SINGAPORE PTE. LTD. is seeking a Junior/Senior R&D Digital IC Design Engineer to contribute to ASIC digital design projects. The ideal candidate should possess a degree in Electrical Engineering and have experience in digital design, specifically with Verilog and ASIC design flows.