The Digital Engineering group is a highly collaborative organization comprising experienced ASIC and Systems engineers with deep expertise across architecture, logic design, verification, physical design, hardware–software co-simulation, FPGA prototyping, and firmware development
Job Summary
The Digital Engineering group is a highly collaborative organization comprising experienced ASIC and Systems engineers with deep expertise across architecture, logic design, verification, physical design, hardware–software co-simulation, FPGA prototyping, and firmware development.
The team leverages advanced semiconductor process technologies and industry-standard EDA tools to deliver high-quality silicon solutions spanning the full SoC development lifecycle.
The role involves leading verification efforts, developing verification environments, supporting HW-FW co-verification, debugging complex issues, and mentoring junior engineers to ensure timely and high-quality delivery.
Matching Summary
The Digital Engineering group is a highly collaborative organization comprising experienced ASIC and Systems engineers with deep expertise across architecture, logic design, verification, physical design, hardware–software co-simulation, FPGA prototyping, and firmware development.
Skills & Requirements
Must-have
SystemVerilog and UVM verification
ASIC verification methodologies
Low-power verification using UPF/CPF
C/C++ test development for HW-FW co-verification
Verification planning and execution
Debugging RTL and gate-level issues
Nice-to-have
Scripting with Python or Perl
Experience with Git, Jira, and Confluence
Collaborative and clear communication skills
Mentoring junior engineers
Cross-functional team collaboration
Key Requirements
10–12 years of industry experience
Strong track record of block or sub-system verification ownership
Experience contributing to multiple successful tape-outs