Asic/fpga Verification Engineer (experienced, Lead, Or Senior)
Boeing Australia Holdings
El Segundo, CA, US
Experienced (level 3): $119,850 - $162,150; lead (...
100% onsite
Uvm & system verilog environment
Object-oriented programming principles
Functional coverage models
Design and implement an ASIC/FPGA verification environment utilizing UVM & System Verilog
Job Summary
Design and implement an ASIC/FPGA verification environment utilizing UVM & System Verilog.
Develop self-checking and reusable test benches from the ground up, employing Object-Oriented Programming principles such as Inheritance and Polymorphism, while utilizing UVM to build drivers, monitors, predictors, and scoreboards.
Collaborate with cross-functional teams to ensure that verification strategies align with overall project goals and timelines.
Matching Summary
Design and implement an ASIC/FPGA verification environment utilizing UVM & System Verilog.