Principal Design Verification Engineer

NXP USA INC.

Systemverilog and uvm proficiency
Asic verification methodology experience
Upf/cpf low-power verification skills
The Digital Engineering group is a highly collaborative organization comprising experienced ASIC and Systems engineers with deep expertise across architecture and logic design

Job Summary

  • The Digital Engineering group is a highly collaborative organization comprising experienced ASIC and Systems engineers with deep expertise across architecture and logic design.
  • Responsibilities include leading verification efforts for complex IPs, designing reusable verification environments, and driving functional coverage closure for owned blocks.
  • Candidates are expected to mentor junior verification engineers while collaborating with cross-functional teams to ensure timely and high-quality silicon delivery.

Matching Summary

The Digital Engineering group is a highly collaborative organization comprising experienced ASIC and Systems engineers with deep expertise across architecture and logic design.

Skills & Requirements

Must-have

  • SystemVerilog and UVM proficiency
  • ASIC verification methodology experience
  • UPF/CPF low-power verification skills
  • C/C++ test development capabilities
  • Python or Perl scripting knowledge

Nice-to-have

  • Mentoring junior engineers
  • Cross-functional collaboration skills
  • Debugging complex RTL issues
  • Strong analytical problem solving

Key Requirements

  • 10–12 years of industry experience
  • Track record of successful tape-outs
  • Block or sub-system verification ownership

Work Rights

Not specified

Tailored Resume

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