Design Verification Director

Astera Labs

Bangalore, India
On-site
End-to-end verification methodology
Uvm-based test plan development
Pcie/cxl protocols (gen3 and above)
Lead verification for a flagship product in rack-scale AI infrastructure connectivity solutions

Job Summary

  • Lead verification for a flagship product in rack-scale AI infrastructure connectivity solutions.
  • Own and drive the end-to-end verification methodology, championing advanced techniques like UVM and formal verification.
  • Shape workforce transformation by building hybrid skill sets for AI-driven verification challenges of the 2030s.

Matching Summary

Lead verification for a flagship product in rack-scale AI infrastructure connectivity solutions.

Skills & Requirements

Must-have

  • end-to-end verification methodology
  • UVM-based test plan development
  • PCIe/CXL protocols (Gen3 and above)
  • AI-driven verification challenges

Nice-to-have

  • technical excellence and innovation
  • workforce transformation strategies
  • customer engagements and industry forums

Key Requirements

  • 15+ years of experience in design verification
  • Bachelor’s degree in Electrical or Computer Engineering
  • Hands-on expertise with Verification IPs for PCIe/CXL

Work Rights

Not specified

Tailored Resume

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