Dataflow Development Engineer - Lpu Hardware Dataflow

NVIDIA

Not specified
Fpga development
Hardware dataflow
Hardware/software co-design
NVIDIA is seeking a Dataflow Development Engineer to enhance dataflow systems at the hardware-software boundary, particularly involving FPGA accelerators. The ideal candidate should possess substantial experience in FPGA development, dataflow architectures, and relevant programming skills, contributing to low-latency, efficient processing solutions

Job Summary

  • Develop, build, and improve dataflow systems at the hardware–software boundary, working on FPGA accelerator dataflow.
  • Implement dataflow pipelines and streaming architectures in hardware, build efficient host–device interfaces, and collaborate with compiler and architecture teams.
  • Your work directly affects latency, efficiency, and resource usage for inference at scale, joining a team of world-class engineers at NVIDIA.

Matching Summary

Match Score: 85

NVIDIA is seeking a Dataflow Development Engineer to enhance dataflow systems at the hardware-software boundary, particularly involving FPGA accelerators. The ideal candidate should possess substantial experience in FPGA development, dataflow architectures, and relevant programming skills, contributing to low-latency, efficient processing solutions.

Skills & Requirements

Must-have

  • FPGA development
  • hardware dataflow
  • hardware/software co-design
  • RTL/HDL (Verilog, VHDL)
  • C/C++ programming
  • hardware interfaces (PCIe, DMA, VFIO)
  • dataflow and streaming concepts

Nice-to-have

  • FPGA dataflow for ML inference
  • low-level driver or BSP development
  • ASIC or custom-silicon dataflow
  • compiler backends or HLS
  • multi-FPGA or FPGA–GPU systems

Key Requirements

  • BS or higher degree or equivalent experience
  • more than 5 years in FPGA development
  • Hands-on experience with RTL/HDL or HLS
  • Solid programming abilities in C/C++
  • Familiarity with FPGA toolchains and Linux

Work Rights

Not specified

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