Staff Digital Verification Engineer

Analog Devices Foundation

Istanbul, Turkey
Systemverilog
Uvm
Constrained-random test scenarios
The Instrumentation Group at ADI is seeking a Staff Digital Design Verification Engineer to join our growing team in Istanbul, Turkey

Job Summary

  • The Instrumentation Group at ADI is seeking a Staff Digital Design Verification Engineer to join our growing team in Istanbul, Turkey.
  • The role involves contributing to the verification of complex digital and mixed‑signal IPs and subsystems to ensure high product quality and first‑pass silicon success.
  • Analog Devices is an equal opportunity employer and fosters a culture where everyone has an opportunity to succeed.

Matching Summary

The Instrumentation Group at ADI is seeking a Staff Digital Design Verification Engineer to join our growing team in Istanbul, Turkey.

Skills & Requirements

Must-have

  • SystemVerilog
  • UVM
  • constrained-random test scenarios
  • coverage-driven test scenarios
  • debug issues
  • gate-level simulations

Nice-to-have

  • mixed-signal or AMS verification
  • Perl, Python, and/or TCL scripting
  • formal verification
  • CDC
  • linting

Key Requirements

  • BS or MS in Electronic Engineering
  • 8+ years of experience
  • Strong expertise in SystemVerilog, UVM
  • Experience with functional and assertion coverage
  • Knowledge of linting, CDC, and formal verification
  • Familiarity with scripting languages
  • Experience working across full ASIC/SoC development

Work Rights

Not specified

Tailored Resume

Cover Letter