Vlsi Physical Design / Apr Engineer

Ambarella

Vlsi advance technology node implementation
Chip floorplanning expertise required
Timing signal integrity power integrity closure
The role focuses on VLSI physical design implementation for cutting-edge 2nm and below technology nodes

Job Summary

  • The role focuses on VLSI physical design implementation for cutting-edge 2nm and below technology nodes.
  • Responsibilities include comprehensive chip floorplanning and closures on timing, signal integrity, power integrity, DFM, and physical verifications.
  • Candidates are expected to develop physical design flows and solutions while demonstrating strong communication and teamwork skills.

Matching Summary

The role focuses on VLSI physical design implementation for cutting-edge 2nm and below technology nodes.

Skills & Requirements

Must-have

  • VLSI Advance Technology Node implementation
  • Chip floorplanning expertise required
  • Timing signal integrity power integrity closure
  • DFM and physical verifications experience
  • Physical design flows development

Nice-to-have

  • Good communication skills and enthusiasm
  • Teamwork spirit and responsible attitude
  • Familiarity with industrial ASIC design flow
  • Experience with Innovus or ICC2 EDA tools

Key Requirements

  • Studied VLSI design related courses
  • Experience on EDA tool of Innovus or ICC2 is a plus
  • Familiar with industrial ASIC design flow is a plus

Work Rights

Not specified

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