Senior Physical Design Application Engineer

Intel Retiree Medical Plan Trust

Phoenix, Arizona, United States
Base: $122,440.00-232,190.00 usd; bonus/equity: st...
Hybrid
4+ years advanced cmos process experience
3+ years asic physical design implementation
Cadence tool suite proficiency (innovus, tempus)
This role provides comprehensive technical support to Intel Foundry Services customers on PDKs, digital reference flows, and design signoff methodologies with a specialized focus on Cadence tool suites

Job Summary

  • This role provides comprehensive technical support to Intel Foundry Services customers on PDKs, digital reference flows, and design signoff methodologies with a specialized focus on Cadence tool suites.
  • The position drives quality improvements in design kits through ASIC design reference flow validation and supports customers through successful tape-outs of advanced CMOS processes.
  • Candidates will benefit from direct customer engagement, access to Intel's most advanced foundry technologies, and competitive compensation including stock bonuses and comprehensive benefits.

Matching Summary

This role provides comprehensive technical support to Intel Foundry Services customers on PDKs, digital reference flows, and design signoff methodologies with a specialized focus on Cadence tool suites.

Salary

Base: $122,440.00-232,190.00 USD; Bonus/Equity: Stock bonuses included; Benefits: Health, retirement, and vacation programs

Skills & Requirements

Must-have

  • 4+ years advanced CMOS process experience
  • 3+ years ASIC physical design implementation
  • Cadence tool suite proficiency (Innovus, Tempus)
  • Scripting skills in Python, Perl, Tcl, or shell
  • US Citizenship required

Nice-to-have

  • Active US Government Security Clearance Secret level
  • Experience with 7nm and below process technology
  • Customer-facing technical support experience
  • Hands-on Synopsys tool experience
  • Hierarchical and multi-voltage domain design expertise

Key Requirements

  • Bachelor's degree in Electrical Engineering or STEM field
  • US Citizenship required
  • Ability to obtain US Government Security Clearance
  • 4+ years experience with 22nm and below processes
  • 3+ years ASIC physical design or signoff experience

Work Rights

Must have US citizenship

Tailored Resume

Cover Letter