Asic Design Engineer

Cisco UK

Egypt
Onsite
Verilog rtl implementation
Timing and performance requirements
Functional coverage analysis
Join the Cisco Silicon One team in developing a unified silicon architecture for web scale and service provider networks

Job Summary

  • Join the Cisco Silicon One team in developing a unified silicon architecture for web scale and service provider networks.
  • Cisco’s silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon organization with the startup culture and breadth of growth opportunities.
  • At Cisco we connect everything: people, processes, data, and things. We innovate everywhere, taking ambitious risks to shape the technologies that give us smart cities, connected cars, and handheld hospitals.

Matching Summary

Join the Cisco Silicon One team in developing a unified silicon architecture for web scale and service provider networks.

Skills & Requirements

Must-have

  • Verilog RTL implementation
  • Timing and performance requirements
  • Functional coverage analysis
  • Collaborate with verification team
  • Close timing and place-and-route issues
  • Post silicon validation tests

Nice-to-have

  • Startup culture and growth opportunities
  • Interactive and waveform debug skills
  • Collaborative and team-focused
  • Commitment to learn and grow
  • Scripting experience highly desirable

Key Requirements

  • Bachelor's or Master's degree
  • 5+ years of ASIC Design experience
  • Excellent Verilog/System Verilog skills
  • Scripting experience (Python, Perl, TCL, shell programming)

Work Rights

Not specified

Tailored Resume

Cover Letter