Gpio Circuit Design Engineer

GlobalFoundries

Cmos design
Analog/io ip development
Rtl design (verilog/vhdl)
Responsible for the development and delivery of IO IPs (GPIO, LVDS, SSTL, HSTL, MIPI, etc) in multiple technology nodes and achieving corresponding PPA indicators

Job Summary

  • Responsible for the development and delivery of IO IPs (GPIO, LVDS, SSTL, HSTL, MIPI, etc) in multiple technology nodes and achieving corresponding PPA indicators.
  • Collaborate in the design and implementation of test chips, packaging design, test board design, post-silicon testing, and qualification.
  • GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce.

Matching Summary

Responsible for the development and delivery of IO IPs (GPIO, LVDS, SSTL, HSTL, MIPI, etc) in multiple technology nodes and achieving corresponding PPA indicators.

Skills & Requirements

Must-have

  • CMOS design
  • Analog/IO IP development
  • RTL design (Verilog/VHDL)
  • Synthesis and timing closure
  • ESD, pad ring design
  • Physical verification flows

Nice-to-have

  • Low-power design techniques
  • IO reliability knowledge
  • Silicon validation experience
  • Lab debug tools familiarity
  • Process technology impact on circuit design

Key Requirements

  • Bachelor's or master's degree
  • 3+ years of experience in semiconductor IP design
  • High Speed I/O Design is a plus

Work Rights

Not specified

Tailored Resume

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