Principle/staff Sta Engineer

NXP USA INC.

Noida, India
Static timing analysis (sta)
Synopsys primetime or cadence tempus
Sdc constraint generation and debugging
This role involves leading comprehensive Static Timing Analysis at block, sub-system, and SoC levels for cutting-edge semiconductor designs

Job Summary

  • This role involves leading comprehensive Static Timing Analysis at block, sub-system, and SoC levels for cutting-edge semiconductor designs.
  • Candidates must possess expert-level proficiency with industry-standard STA tools such as Synopsys PrimeTime or Cadence Tempus.
  • The position requires a proven track record of resolving complex timing violations including setup, hold, OCV, AOCV, EMIR, and X-talk.

Matching Summary

This role involves leading comprehensive Static Timing Analysis at block, sub-system, and SoC levels for cutting-edge semiconductor designs.

Skills & Requirements

Must-have

  • Static Timing Analysis (STA)
  • Synopsys PrimeTime or Cadence Tempus
  • SDC constraint generation and debugging
  • Tcl, Perl, Python scripting proficiency
  • Complex SoC design experience

Nice-to-have

  • Mentorship of junior engineers
  • Experience with 28nm to 5nm nodes
  • Global team collaboration skills
  • Leadership in driving timing closure

Key Requirements

  • Bachelor's or Master's degree in Electronics Engineering
  • 6+ years experience for Staff Engineer level
  • 9+ years experience for Principle Engineer level
  • Hands-on experience with physical design concepts

Work Rights

Not specified

Tailored Resume

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