You will drive the backend process through the entire RTL 2 GDS Implementation flow including hierarchical floor planning, place & route, timing closure, power integrity, static timing verification, physical verification and equivalence checks, with special focus on performance & die size optimization
Job Summary
You will drive the backend process through the entire RTL 2 GDS Implementation flow including hierarchical floor planning, place & route, timing closure, power integrity, static timing verification, physical verification and equivalence checks, with special focus on performance & die size optimization.
Analyzes current generation quality and efficiency gaps to identify proper incremental or evolutionary changes to the existing physical design related Tools, Flow and Methodology.
At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond.
Matching Summary
You will drive the backend process through the entire RTL 2 GDS Implementation flow including hierarchical floor planning, place & route, timing closure, power integrity, static timing verification, physical verification and equivalence checks, with special focus on performance & die size optimization.
Skills & Requirements
Must-have
RTL to GDS implementation flow
Floor planning and P&R tools
Static timing verification
Physical verification and equivalence checks
Performance and die size optimization
Automation scripts within STA tools
Nice-to-have
Creative solutions for implementation issues
Empathy and collaboration
Innovating for the AI era
Key Requirements
13+ years of related work experience
Large designs (>100M gates)
Sub 16/14/7/5/3nm technologies
Bachelor's or Master’s Degree in Electrical or Computer Engineering