Rtl Design And Integration Engineer, Tpu And Ml

Google

Sunnyvale, CA, United States
Base: $138,000-$198,000; bonus/equity: included; b...
Not specified (assumed to be flexible based on company culture)
Systemverilog rtl coding expertise
Digital logic design skills
Computer architecture knowledge
Google is seeking an RTL Design and Integration Engineer to contribute to the development of its cutting-edge TPU technology, which powers AI/ML applications. The role involves designing, implementing, and integrating key digital logic components for TPUs, requiring collaboration across various teams

Job Summary

  • You will drive cutting-edge TPU technology that powers Google's most demanding AI/ML applications.
  • The role involves defining complex microarchitecture and writing high-quality, performant, and power-efficient RTL code primarily in SystemVerilog.
  • You will partner with cross-functional teams including verification, physical design, and firmware to deliver hardware solutions.

Matching Summary

Match Score: 85

Google is seeking an RTL Design and Integration Engineer to contribute to the development of its cutting-edge TPU technology, which powers AI/ML applications. The role involves designing, implementing, and integrating key digital logic components for TPUs, requiring collaboration across various teams.

Salary

Base: $138,000-$198,000; Bonus/Equity: Included; Benefits: Not specified

Skills & Requirements

Must-have

  • SystemVerilog RTL coding expertise
  • Digital logic design skills
  • Computer architecture knowledge
  • On-Chip Network design experience
  • Block-level and chip-level integration

Nice-to-have

  • Cross-functional collaboration abilities
  • Debugging complex digital designs
  • Continuous improvement mindset
  • Power-efficient design focus

Key Requirements

  • Expertise in digital logic design
  • Proficiency in computer architecture
  • Experience with RTL coding in SystemVerilog

Work Rights

Not specified

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