Senior Soc Design Verification Engineer

Altera Corporation

Bengaluru, Karnataka, India
Uvm methodology
System verilog language
Arm based soc verification
You will be responsible for SoC architecture verification related tasks including creating test cases and test bench using UVM methodology

Job Summary

  • You will be responsible for SoC architecture verification related tasks including creating test cases and test bench using UVM methodology.
  • Coordinate cross functional efforts with Design, SW, Architecture team to achieve full coverage verification plan.
  • Experience on Emulation will be an add on.

Matching Summary

You will be responsible for SoC architecture verification related tasks including creating test cases and test bench using UVM methodology.

Skills & Requirements

Must-have

  • UVM methodology
  • System Verilog language
  • ARM based SoC verification
  • Linux/Unix scripting
  • Perl or Python proficiency

Nice-to-have

  • Emulation experience
  • Design for Debug experience
  • Strong communication skills
  • Flexible in dynamic environment

Key Requirements

  • 8+ years of experience
  • Complex ASIC designs and/or verification
  • Formal verification method
  • Protocols such as PCIe, Ethernet, USB, TSN
  • High speed USB, PCIe based debug

Work Rights

Not specified

Tailored Resume

Cover Letter