Senior Staff Silicon Design Engineer - RTL

XILINX ASIA PACIFIC PTE. LTD.

Singapore
**
Rtl design in verilog/vhdl
Asic/digital ic development experience
End-to-end digital asic design flow
** Xilinx Asia Pacific Pte. Ltd. is hiring a Senior Staff Silicon Design Engineer to join their SerDes Technology group in Singapore. The ideal candidate will have experience in ASIC and digital IC development, with a strong background in RTL design, verification, and problem-solving skills. **

Job Summary

  • The role involves contributing to the architecture and implementation of next-generation high-speed interface technologies within the SerDes Technology group.
  • Candidates will execute design work across all aspects of the FPGA/ASIC digital design flow, from architectural specification through post-silicon validation.
  • The position requires a self-driven engineer capable of developing complex digital logic blocks in leading-edge technology nodes.

Matching Summary

Match Score: 75

** Xilinx Asia Pacific Pte. Ltd. is hiring a Senior Staff Silicon Design Engineer to join their SerDes Technology group in Singapore. The ideal candidate will have experience in ASIC and digital IC development, with a strong background in RTL design, verification, and problem-solving skills. **

Skills & Requirements

Must-have

  • RTL design in Verilog/VHDL
  • ASIC/digital IC development experience
  • End-to-end digital ASIC design flow
  • Functional verification and DFT implementation
  • Post silicon validation and debug skills

Nice-to-have

  • Experience with AI-assisted engineering tools
  • Strong problem-solving and debugging abilities
  • Excellent verbal and written communication skills
  • Innovative and detail-oriented mindset
  • Proven track record of complex tapeouts

Key Requirements

  • Bachelor or Masters Degree in Electronic Engineering
  • Completion of several complex ASIC or IC production tapeouts
  • Years of relevant work experience in digital IC development

Work Rights

Not specified

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