Principal Analog Mixed-signal Design Engineer

Astera Labs

Toronto, Canada
On-site
Advanced node cmos products
Pll, dll, adc, regulators, amplifiers, tx, rx, cdrs design
Analog and clocking blocks for connectivity
Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions

Job Summary

  • Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions.
  • Responsibilities include developing and verifying circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, and CDRs to meet performance targets.
  • The company seeks a highly motivated designer for this role with a proven ability to drive results and collaborate with global teams.

Matching Summary

Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions.

Skills & Requirements

Must-have

  • Advanced node CMOS products
  • PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs design
  • Analog and clocking blocks for connectivity
  • Spectre and MATLAB usage
  • High-speed mixed-signal circuits
  • Transistor-level design
  • Feedback/stability analysis
  • Noise/jitter analysis
  • Lab chip bring-up and debugging

Nice-to-have

  • TIA design for optical applications
  • RFIC design for wireless/wireline
  • Relevant research publications/patents
  • Programming/scripting languages
  • PCB design experience
  • Verilog RTL or DSP design concepts
  • Optical transceivers knowledge
  • ESD protection techniques
  • IC packaging methodologies

Key Requirements

  • Master’s or PhD degree in EE
  • 8+ years of experience in analog IC designs
  • Hands-on experience in high-speed mixed-signal circuits
  • Deep understanding of biasing, band-gaps, reference circuits, opamps, comparators
  • Solid track-record for implementation of analog circuits high-speed data transmission
  • Design and tape out experience in advanced CMOS nodes (7nm, 5nm, 3nm FinFET)
  • Strong technical independent contributor
  • Excellent teamwork, presentation, and documentation skills
  • Ability to collaborate with global teams across multiple time zones
  • Deliver under pressure with strict deadlines
  • Strong experience in lab chip bring-up and debugging efforts

Work Rights

Not specified

Tailored Resume

Cover Letter