This role focuses on verifying the correctness, performance, and compliance of next-generation FPGA and SoC designs with a strong emphasis on PCIe subsystems
Job Summary
This role focuses on verifying the correctness, performance, and compliance of next-generation FPGA and SoC designs with a strong emphasis on PCIe subsystems.
The successful candidate will develop comprehensive UVM-based testbenches and define verification plans covering functional coverage, code coverage, and protocol compliance checks.
As a senior individual contributor, you will mentor junior engineers and drive closure of verification milestones across multiple concurrent programs.
Matching Summary
This role focuses on verifying the correctness, performance, and compliance of next-generation FPGA and SoC designs with a strong emphasis on PCIe subsystems.