Director, Asic Design-for-test

Acacia, part of Cisco

United States
Base: $230,100.00 - $374,100.00; bonus/equity: not...
Fully remote
Asic dft methodologies
Jtag, boundary scan, edt scan atpg
Mbist/mbisr
Lead a team of Design-For-Test engineers in the development of cutting-edge ASICs for multi-100G to 1.6T coherent optical communications products

Job Summary

  • Lead a team of Design-For-Test engineers in the development of cutting-edge ASICs for multi-100G to 1.6T coherent optical communications products.
  • Allocate team resources, provide technical leadership on DFT processes, and manage test pattern development and post-silicon ATE debug.
  • Cisco offers a comprehensive benefits package including medical, dental, vision insurance, a 401(k) plan with matching contribution, and paid time away.

Matching Summary

Lead a team of Design-For-Test engineers in the development of cutting-edge ASICs for multi-100G to 1.6T coherent optical communications products.

Salary

Base: $230,100.00 - $374,100.00; Bonus/Equity: Not specified; Benefits: Medical, dental, vision, 401(k) match, paid parental leave, disability, life insurance, stock units, paid time away

Skills & Requirements

Must-have

  • ASIC DFT methodologies
  • JTAG, boundary scan, EDT scan ATPG
  • MBIST/MBISR
  • test pattern development
  • post-silicon ATE debug

Nice-to-have

  • collaboration across global teams
  • self-motivated and organized
  • strong team player

Key Requirements

  • Bachelor's or Master's degree in CS, CE, EE
  • 15+ years industry experience
  • 5+ years managing direct reports
  • Experience with latest ASIC DFT methodologies, tools, and scripting/programming languages

Work Rights

Not specified

Tailored Resume

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