Rtl-gdsii, Sr Application Engineer

Cadence

Base: $84,000 to $156,000 (california); bonus/equi...
Physical implementation at 7nm and below
Digital synthesis and place-and-route expertise
Static timing analysis and power optimization
The role involves leading technical strategy for critical customer design projects at advanced nodes like 3nm and below

Job Summary

  • The role involves leading technical strategy for critical customer design projects at advanced nodes like 3nm and below.
  • Candidates will serve as primary consultants for synthesis, place & route, and timing signoff while leveraging AI capabilities.
  • The position offers competitive compensation including bonus, equity, and comprehensive benefits such as a 401(k) match.

Matching Summary

The role involves leading technical strategy for critical customer design projects at advanced nodes like 3nm and below.

Salary

Base: $84,000 to $156,000 (California); Bonus/Equity: Eligible for incentive compensation; Benefits: Paid vacation, holidays, 401(k), medical/dental/vision

Skills & Requirements

Must-have

  • Physical implementation at 7nm and below
  • Digital synthesis and place-and-route expertise
  • Static timing analysis and power optimization
  • TCL, PERL, Python scripting proficiency
  • Advanced node design convergence skills

Nice-to-have

  • Agentic-AI integration in EDA flows
  • Strong customer relationship building
  • Mentoring junior engineering teams
  • Experience with 3nm node designs
  • Leadership in design methodology influence

Key Requirements

  • Bachelor's or Master's in Electrical/Computer Engineering
  • 2+ years experience in physical implementation at 7nm and below
  • Multiple successful tapeouts required
  • Proficiency in debugging critical design issues

Work Rights

Not specified

Tailored Resume

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