Soc Physical Design Power Delivery Engineer

Intel

Bangalore, India
Hybrid
Block level full chip level em ir analysis
Pdn signoff using redhawk rhsc voltus
Static ir dynamic ir vless vcd checks
The candidate will define the SoC level power delivery architecture and drive overall PDN convergence and sign-off for next-generation Server SoCs

Job Summary

  • The candidate will define the SoC level power delivery architecture and drive overall PDN convergence and sign-off for next-generation Server SoCs.
  • Responsibilities include validating IR drops using Static IR, Dynamic IR, Vless, and VCD checks for both Die and Package components.
  • The role requires collaboration with SOC and Packaging teams to optimize bump assignments, RDL enablement, and package routing.

Matching Summary

The candidate will define the SoC level power delivery architecture and drive overall PDN convergence and sign-off for next-generation Server SoCs.

Skills & Requirements

Must-have

  • Block level Full chip level EM IR analysis
  • PDN Signoff using Redhawk RHSC Voltus
  • Static IR Dynamic IR Vless VCD Checks
  • ESD analysis and Signoff for High Performance SOCs
  • Tcl Perl Python scripting proficiency

Nice-to-have

  • Good knowledge on Power Delivery (PD)
  • Experience with Innovus for RDL and Bump Planning
  • Effective communication with global cross-functional teams

Key Requirements

  • Bachelors or Masters in Electrical Engineering
  • At least 8+ years of experience in EM IR PDN analysis
  • Hands-on experience with PDN Signoff tools

Work Rights

Not specified

Tailored Resume

Cover Letter