Physical Design Engineer (pnr/physical Verification/sta/emir)

Cadence

Multiple Locations
Physical design implementation
Static timing analysis
Physical verification (drc/lvs/antenna)
The candidate will have the opportunity to work on many varieties of challenging designs, i.e. low power and high speed design

Job Summary

  • The candidate will have the opportunity to work on many varieties of challenging designs, i.e. low power and high speed design.
  • Participating in or leading next generation PHY IP physical design, methodology and flow development, the candidate will work closely with our RTL design team & Analog Team to ensure successful tapeouts.
  • We’re doing work that matters. Help us solve what others can’t.

Matching Summary

The candidate will have the opportunity to work on many varieties of challenging designs, i.e. low power and high speed design.

Skills & Requirements

Must-have

  • Physical design implementation
  • Static timing analysis
  • Physical verification (DRC/LVS/Antenna)
  • EM/IR signoff
  • DFM Closure

Nice-to-have

  • Low power and high speed design
  • Methodology and flow development
  • Teamwork and communication

Key Requirements

  • 5+ years work experience
  • Bachelor or above degree
  • Knowledge of scripting languages
  • Ability to fix physical design violations
  • Deep experience of static timing analysis

Work Rights

Not specified

Tailored Resume

Cover Letter