Lead or mentor a team of engineers working on FPGA IP verification, defining team priorities, setting goals, and monitoring performance through KPIs
Job Summary
Lead or mentor a team of engineers working on FPGA IP verification, defining team priorities, setting goals, and monitoring performance through KPIs.
Oversee the development and delivery of verification of IPs owned by the team, ensuring alignment with QPDS/releases and driving innovation in verification methodologies.
Perform hands-on technical verification lead for IPs on FPGA, developing verification plans, test benches, and environments to ensure coverage and uncover bugs.
Matching Summary
Lead or mentor a team of engineers working on FPGA IP verification, defining team priorities, setting goals, and monitoring performance through KPIs.
Skills & Requirements
Must-have
FPGA IP verification
RTL design and verification
OVM/UVM, System Verilog
constrained random verification
simulation tools (ModelSim, Questa, VCS)
Nice-to-have
Ethernet/PCIe/PIPE experience
FPGA architecture expertise
collaboration with cross-functional teams
technical leadership and mentorship
Key Requirements
10+ years of experience in verification
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field