Senior Physical Design Application Engineer

Intel

Phoenix, Arizona, United States
Base: $122,440.00-232,190.00 usd; bonus/equity: st...
Hybrid
4+ years advanced cmos process experience
3+ years asic physical design implementation
Cadence eda tool suite proficiency
Intel Foundry is seeking a Senior Applications Engineer to drive quality improvements in design kits and support customers through successful tape-outs

Job Summary

  • Intel Foundry is seeking a Senior Applications Engineer to drive quality improvements in design kits and support customers through successful tape-outs.
  • The role requires expert guidance on advanced CMOS process implementation using Cadence tool suites like Innovus and Tempus.
  • Candidates will benefit from direct engagement with cutting-edge digital design technologies and access to Intel's most advanced foundry tools.

Matching Summary

Intel Foundry is seeking a Senior Applications Engineer to drive quality improvements in design kits and support customers through successful tape-outs.

Salary

Base: $122,440.00-232,190.00 USD; Bonus/Equity: Stock bonuses included; Benefits: Health, retirement, and vacation programs

Skills & Requirements

Must-have

  • 4+ years advanced CMOS process experience
  • 3+ years ASIC physical design implementation
  • Cadence EDA tool suite proficiency
  • Python Perl Tcl shell scripting skills
  • US Citizenship required

Nice-to-have

  • Active US Government Security Clearance
  • Experience with 7nm and below processes
  • Customer-facing technical support experience
  • Synopsys Fusion Compiler PrimeTime knowledge
  • Hierarchical multi-voltage domain design

Key Requirements

  • Bachelor's degree in Electrical Engineering or STEM field
  • US Citizenship mandatory
  • Ability to obtain US Government Security Clearance
  • Minimum 4 years experience with 22nm and below processes
  • Minimum 3 years ASIC physical design implementation experience

Work Rights

Must have US citizenship

Tailored Resume

Cover Letter