Marvell is seeking a Senior Staff Engineer to develop verification plans for storage IP designs within their Compute and Custom Solutions team
Job Summary
Marvell is seeking a Senior Staff Engineer to develop verification plans for storage IP designs within their Compute and Custom Solutions team.
The role requires creating and maintaining testbenches using industry-standard tools like SystemVerilog, UVM, and Python while collaborating with design teams to resolve issues.
Candidates will enjoy competitive compensation including a 13th-month salary, performance bonuses, RSUs, and generous paid leave policies with company-wide recharge periods.
Matching Summary
Marvell is seeking a Senior Staff Engineer to develop verification plans for storage IP designs within their Compute and Custom Solutions team.
Salary
Competitive salary; 13th-month salary and performance-based bonus; RSUs included
Skills & Requirements
Must-have
SystemVerilog proficiency
UVM methodology experience
ASIC design flow understanding
Digital design verification skills
EDA tools expertise (Cadence/Synopsys)
Python or Perl scripting
Nice-to-have
Mentoring junior engineers
Strong mathematical background
Excellent communication skills
Fluent English language
Key Requirements
BS/MS/PhD in Electrical Engineering or related field
Experience with ASIC design flow and EDA tools
Eligibility for US export control access
Work Rights
Must be eligible to access export-controlled information under US law