Lead the development and execution of comprehensive test benches to verify DFT architectures, ensuring thorough coverage of design specifications
Job Summary
Lead the development and execution of comprehensive test benches to verify DFT architectures, ensuring thorough coverage of design specifications.
Drive innovation in hardware DFT and test strategies for emerging silicon device models, promoting reusable methodologies and standards.
Your work will directly enhance test coverage, debug efficiency, and product quality, making a significant impact on Cisco’s silicon design and validation processes.
Matching Summary
Lead the development and execution of comprehensive test benches to verify DFT architectures, ensuring thorough coverage of design specifications.
Skills & Requirements
Must-have
DFT architecture development
test planning and development
ATE screening
in-system testing
debugging and diagnostics
SystemVerilog testbench development
Nice-to-have
collaborative and dynamic environment
reusable test and debug methodologies
cutting-edge hardware DFT strategies
solving complex challenges
empathy and collaboration
Key Requirements
10+ years experience in design verification or ASIC design
Proven test planning experience
Proficiency in debugging using DVE/Verdi
Experience in scripting languages (Tcl, Python, Perl)
Knowledge of JTAG protocol, scan architecture, MBIST, boundary scan