Not specified (considering future relocation to tampines in end 2026).
Thin film deposition techniques
Panel-level packaging process integration
Fan-out panel-level packaging (foplp)
Applied Materials South East Asia Pte. Ltd. is seeking a Senior MTS, Advanced Packaging Integration Engineer to drive innovation in advanced packaging processes, particularly in thin film deposition and etching techniques. The role involves leading complex engineering projects, collaborating across teams, and contributing to technology development and optimization in semiconductor packaging
Job Summary
This role leads the development of advanced packaging process flows for panel-level technologies and large-format form factors.
The successful candidate will optimize thin film deposition techniques including PVD, CVD, ALD, and ECD to drive innovation in semiconductor manufacturing.
Key responsibilities include collaborating with business units to define product strategy, supporting technology transfer to high-volume manufacturing, and ensuring customer specification compliance.
Matching Summary
Match Score: 85
Applied Materials South East Asia Pte. Ltd. is seeking a Senior MTS, Advanced Packaging Integration Engineer to drive innovation in advanced packaging processes, particularly in thin film deposition and etching techniques. The role involves leading complex engineering projects, collaborating across teams, and contributing to technology development and optimization in semiconductor packaging.
Skills & Requirements
Must-have
Thin film deposition techniques
Panel-level packaging process integration
Fan-out panel-level packaging (FOPLP)
Physical Vapor Deposition (PVD) expertise
Chemical Vapor Deposition (CVD) knowledge
Atomic Layer Deposition (ALD) experience
Electrochemical Deposition (ECD) skills
Nice-to-have
Strong problem-solving skills in fast-paced environment
Experience with customer technology transfer
Ability to publish in ET conferences and journals
Cross-functional collaboration with design teams
Root cause analysis for yield improvement
Key Requirements
Bachelor's degree with 15 years experience or PhD with 5 years
Expertise in dielectric etch and panel packaging process integration
Knowledge of industry standards in semiconductor packaging