Asic Design Engineer, Clocks

Invidia

Shanghai, China
Rtl design experience
Strong coding skills in perl or python
Experience in implementing on-chip clocking networks
The NVIDIA GPU clocks group is looking for a Senior ASIC Design Engineer to join the team

Job Summary

  • The NVIDIA GPU clocks group is looking for a Senior ASIC Design Engineer to join the team.
  • You will collaborate with architects, ASIC designers, and verification engineers to design high frequency and low power clocks.
  • Together with other team members, we deliver clock information to SOC verification team, timing and DFT teams.

Matching Summary

The NVIDIA GPU clocks group is looking for a Senior ASIC Design Engineer to join the team.

Skills & Requirements

Must-have

  • RTL design experience
  • Strong coding skills in Perl or Python
  • Experience in implementing on-chip clocking networks

Nice-to-have

  • Good understanding of backend flows
  • DFT knowledge
  • Excellent analytical and problem-solving skills

Key Requirements

  • BS or MS in EE or equivalent
  • 2+ years of meaningful work experience
  • Fluent English communication skills

Work Rights

Not specified

Tailored Resume

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