Staff Design For Test Engineer

Tenstorrent

Austin, Texas, United States
Base: $100k - $500k; bonus/equity: included in ran...
On-site
Dft logic implementation
Atpg and dfx insertion tools
Fault models
The role is Design for Test (DFT) for high-performance designs going into industry leading AI/ML architectures

Job Summary

  • The role is Design for Test (DFT) for high-performance designs going into industry leading AI/ML architectures.
  • Implement and integrate DFT features (scan, JTAG, compression, ASST, MBIST) into RTL from early design through tapeout across multiple IPs.
  • We value collaboration, curiosity, and a commitment to solving hard problems.

Matching Summary

The role is Design for Test (DFT) for high-performance designs going into industry leading AI/ML architectures.

Salary

Base: $100k - $500k; Bonus/Equity: Included in range; Benefits: Highly competitive

Skills & Requirements

Must-have

  • DFT logic implementation
  • ATPG and DFx insertion tools
  • fault models
  • low-power design flows
  • scan, JTAG, compression, ASST, MBIST

Nice-to-have

  • collaboration across domains
  • solving hard problems
  • curiosity and passion for AI

Key Requirements

  • 5+ years of industry experience
  • BS/MS/PhD in EE/ECE/CE/CS
  • Verilog RTL for DFT logic
  • SystemVerilog/UVM fluency
  • Hands-on ATPG and DFx tools
  • Eligibility for U.S. export-controlled technology

Work Rights

Eligibility for U.S. export-controlled technology

Tailored Resume

Cover Letter