Product Soc Architect

Intel

Santa Clara, California, United States
Base: $190,610.00-311,890.00 usd annually; bonus/e...
Hybrid
8+ years soc cpu subsystem architecture experience
Networking performance engineering expertise
High-speed ethernet packet processing knowledge
Intel is seeking a Senior IPU SoC Architect to lead the architectural vision for its innovative Infrastructure Processing Unit (IPU) and Data Processing Unit (DPU) platforms in Santa Clara, California. The ideal candidate will have extensive experience in SoC architecture and performance optimization, particularly in data center networking and compute memory systems

Job Summary

  • This strategic role involves defining the architectural vision for next-generation Infrastructure Processing Unit (IPU) and Data Processing Unit (DPU) platforms to drive market leadership.
  • Candidates will lead comprehensive architecture development from initial concept through silicon implementation, focusing on cache hierarchies, interconnect fabrics, and memory subsystems.
  • The position offers a competitive total compensation package including stock bonuses, health benefits, and retirement programs within Intel's Central Engineering Group.

Matching Summary

Match Score: 85

Intel is seeking a Senior IPU SoC Architect to lead the architectural vision for its innovative Infrastructure Processing Unit (IPU) and Data Processing Unit (DPU) platforms in Santa Clara, California. The ideal candidate will have extensive experience in SoC architecture and performance optimization, particularly in data center networking and compute memory systems.

Salary

Base: $190,610.00-311,890.00 USD annually; Bonus/Equity: Stock bonuses included; Benefits: Health, retirement, and vacation programs

Skills & Requirements

Must-have

  • 8+ years SoC CPU subsystem architecture experience
  • Networking performance engineering expertise
  • High-speed Ethernet packet processing knowledge
  • Memory subsystem architecture design skills
  • Performance workload methodology definition

Nice-to-have

  • Post Graduate degree in STEM fields
  • ARM/x86 NUMA system experience
  • Experience with IPU SmartNIC accelerator SoCs
  • Familiarity with PCIe CXL memory semantics
  • Multi-generation architectural ownership track record

Key Requirements

  • Bachelor's degree in Electrical or Computer Engineering
  • 8+ years of SoC CPU or subsystem architecture experience
  • Proven leadership in compute and memory system design
  • Experience in high-speed Ethernet and data center networking

Work Rights

Not specified

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