Senior Sta Engineer, Sub-chip

NVIDIA

Multiple Locations
Advanced static timing analysis
Experience in prime time
Hands-on sta experience
NVIDIA is looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team

Job Summary

  • NVIDIA is looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team.
  • You will perform advanced Static Timing Analysis for HSIO at chiplet and FC level.
  • Join a meaningful, growing and highly professional environment where you can make a significant impact.

Matching Summary

NVIDIA is looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team.

Skills & Requirements

Must-have

  • Advanced Static Timing Analysis
  • Experience in Prime Time
  • Hands-on STA experience

Nice-to-have

  • AI tools orientation
  • Experience in Linux environments
  • TCL, Python, shell scripting abilities

Key Requirements

  • B.SC./ M.SC. in Electrical Engineering
  • At least 5+ years of hands-on STA experience

Work Rights

Not specified

Tailored Resume

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