Lead Analog Design Engineer

BETA CAE Systems International AG

Shanghai, China
High-speed cmos serdes design
Advanced cmos technologies (7nm or below)
Data rates of 10gb/s and above
This role could be based in Shanghai or Nanjing and recognized as an analog design expert, demonstrating substantial development & business impact by providing analog expertise across multiple projects/programs

Job Summary

  • This role could be based in Shanghai or Nanjing and recognized as an analog design expert, demonstrating substantial development & business impact by providing analog expertise across multiple projects/programs.
  • Responsible for design, layout, verification, and characterization of high-speed transceiver elements, such as TIAs, limiting amplifiers, I/Os, equalizers, high-speed CML, and other SerDes/CDR/PLL building blocks at data rates of 10Gb/s and above.
  • The ideal candidate is a hands-on self-starter who is able to develop design specifications based on input from colleagues, customers, and industry standards, and who can effectively manage his or her own time to take projects to completion under supervision and guidance.

Matching Summary

This role could be based in Shanghai or Nanjing and recognized as an analog design expert, demonstrating substantial development & business impact by providing analog expertise across multiple projects/programs.

Skills & Requirements

Must-have

  • high-speed CMOS SerDes design
  • advanced CMOS technologies (7nm or below)
  • data rates of 10Gb/s and above
  • Cadence design environment
  • mixed-signal simulation
  • high-speed layout considerations

Nice-to-have

  • hands-on self-starter
  • work independently
  • good communication and presentation skills
  • RF circuits operating at 5GHz or above
  • precision analog and mixed-signal circuits

Key Requirements

  • 10+ years of working/research experience
  • M.S in Electrical Engineering or related areas
  • Ph.D. is a plus
  • experience designing in advanced CMOS technologies
  • data rates of at least 10Gb/s
  • RF circuits operating at 5GHz or above
  • Proficient with Cadence design environment
  • mixed-signal simulation (ADE, Layout, AMS)
  • EM simulation (such as EMX)
  • Good understanding of high-speed layout considerations
  • Working knowledge of theoretical and practical aspects of electro-magnetic structures
  • HFSS experience is a plus
  • Familiar with one of USB, DP, PCIe, UCIe, Ethernet, MIPI, HDMI, CXL, UALink or other industry standards

Work Rights

Not specified

Tailored Resume

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