Job Summary

• The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Product Division)'s designs including DFT Architecture, Test insertion and verification, Pattern generation, Coverage improvement, Post silicon debug and yield improvement to meet the product test metrics.
• The role involves working with the Physical Design & STA team for DFT mode timing closure and could also involve direct interaction with external customers.
• Broadcom is proud to be an equal opportunity employer and considers qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by law.

Matching Summary

Skills & Requirements

Key Requirements

• In-depth knowledge of DFT concepts
• Experience with ATPG, MBIST & IJTAG
• Experience in DFT insertion & verification
• Experience in pattern generation and vector simulation
• Experience in post-silicon debug
• Not specified work authorization

Work Rights