Lead Design Engineer

BETA CAE Systems International AG

Pune, India
Verilog rtl implementation
Design verification fundamentals
Computer architecture/micro-architecture
This is an amazing opportunity to work in an impactful job at a world leader in computational software, semiconductor design IP, and system verification hardware

Job Summary

  • This is an amazing opportunity to work in an impactful job at a world leader in computational software, semiconductor design IP, and system verification hardware.
  • Lead Engineer positions are for one of two roles: Logic Design Team or Design Verification Team for Xtensa processors.
  • We’re doing work that matters. Help us solve what others can’t.

Matching Summary

This is an amazing opportunity to work in an impactful job at a world leader in computational software, semiconductor design IP, and system verification hardware.

Skills & Requirements

Must-have

  • Verilog RTL implementation
  • Design Verification fundamentals
  • computer architecture/micro-architecture
  • SystemVerilog assertions
  • functional coverage
  • scripting languages like Python, Perl, Tcl

Nice-to-have

  • guiding/mentoring junior engineers
  • technical safety concepts
  • embedded SW understanding
  • debugging netlist/gate level simulation

Key Requirements

  • 4+ years of Design or Design Verification experience
  • BS/MS in EE/Computer Engineering or similar
  • Proficient with C language and assembly language

Work Rights

Not specified

Tailored Resume

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