Senior Silicon Design Engineer

Intel Corporation

Penang, Malaysia
Physical design implementation
Rtl to gds flow
Static timing analysis
Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing

Job Summary

  • Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.
  • Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
  • Optimizes design to improve product level parameters such as power, frequency, and area.

Matching Summary

Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.

Skills & Requirements

Must-have

  • physical design implementation
  • RTL to GDS flow
  • static timing analysis
  • power integrity analysis
  • layout verification
  • EDA tools expertise

Nice-to-have

  • low power UPF implementation
  • formal verification techniques
  • system and processor architecture
  • hardware validation techniques

Key Requirements

  • 10+ years of experience
  • complex ASIC/SOC Implementation
  • Btech/Mtech degree
  • System Verilog/SOC development environment
  • PERL, TCL, Python scripting

Work Rights

Not specified

Tailored Resume

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